Forward Thinking. Forward Insights.

A New NAND Flash Player Emerges?

2010-02-05T22:11:00.001-05:00

The U.S. Bankruptcy Court for the District of Delaware approved an agreement by Spansion’s debtors to transfer its Milan development facilities to Elpida Memory. Details of the agreement are unclear at the moment, however, Spansion will apparently retain IP rights for the technology developed at the research center.

Spansion established its Security and Advanced Technology Division (SATD) in 2007 and staffed it with ex-STMicroelectronics NAND flash engineers including division head, Carla Golla who prior to joining Spansion was the general manager of ST’s NAND Flash and Storage Media product group.

The division’s mission is to develop secure products such as the MirrorBit HD-SIM product family and ORNAND2. ORNAND2 - unlike ORNAND which is a Mirrorbit with a NAND interface – is a true NAND architecture based on SONOS technology. Spansion needed a NAND device for its MCPs and ORNAND2 was the solution which allowed Spansion to utilize its charge trap flash knowhow and sidestep IP issues related to floating gate devices. SATD was responsible for product design for ORNAND2 and the process technology was developed in the U.S.

Spansion had planned to ramp ORNAND2 into production in the second half of 2009 on 43nm with foundry partner SMIC. Needless to say, those plans were derailed with Spansion’s Chapter 11 filing.

Elpida has been a supplier of mobile DRAM to Spansion and has lost a major customer as Spansion exits the wireless market. In addition, Elpida is the only tier 1 DRAM company without NAND flash in its product portfolio. Being a second tier supplier of DRAM KGD (known good die) to NOR flash suppliers is an unenviable position. Elpida needs to capture more of the value-added and capitalize on the shift from NOR flash to NAND flash in the cellphone market.

Elpida’s newly acquired asset will allow it to do just that by leveraging SATD’s development of 1Gb-4Gb SLC NAND to offer NAND/DRAM MCP solutions. Whether the device will be SONOS or floating gate-based is not certain, however the fact that Spansion will retain partial IP ownership of SATD developments suggests at some sort of cooperation utilizing Spansion’s SONOS technology. This initial foray into low density SLC NAND may just portend even greater ambitions in the high density data storage market.

NAND Flash Memory - Enabling Mobility

2009-10-03T11:03:00.000-04:00

Here's my presentation from the IDEMA Diskcon U.S.A. conference.

"NAND Flash Memory: Enabling Mobility"
Gregory Wong, Forward Insights
September 23, 2009
http://www.forward-insights.com/present/Wong-Diskcon_0909.pdf

Flash Memory Summit Presentation

2009-08-21T17:06:00.002-04:00

My presentation "NAND Flash Memory Trends" at the Flash Memory Summit has been uploaded.

http://www.forward-insights.com/present/NAND%20Flash%20Memory%20Trends.pdf

A YouTube video of the presentation may be accessed at the following link.

http://www.youtube.com/watch?v=Kh02erRVna4

Samsung and Numonyx Drive PCM Adoption

2009-06-23T23:30:00.002-04:00

Samsung and Numonyx today announced that they will jointly develop common specifications for phase change memory (PCM). Common specifications are necessary to drive the adoption of PCM, particularly since OEMs do not want to be beholden to one supplier. The development of common specifications is analogous to what Intel and ST did in NOR flash starting with the 90nm NOR flash generation and resulted in Intel and ST being dual sourced at major OEMs.

The bit alterability of PCM make it attractive in simplifying firmware and reducing system overhead, however, adoption of PCM will likely be limited until costs approach that of flash memories. With a 45nm 1Gb PCM chip scheduled for production for the end of 2009, Numonyx will be closing the gap with NOR flash, however it'll take much longer for a new memory technology to break out of its niche status, if at all. Just take a look at where FRAM and MRAM are today.

This colloboration is the right step to facilitate the development of the infrastructure supporting PCM. Samsung's backing is a validation of the technology and also provides OEMs the confidence to commit themselves to this emerging memory technology.

Samsung and Toshiba Extend Patent Cross-licensing Agreement

2009-06-22T23:08:00.004-04:00

Samsung and Toshiba have decided to extend their semiconductor patent cross-licensing agreement which ran from September 2002 to March 2009. No timetable was given for the new agreement but it is estimated that it will run for seven years, the same timeframe for the earlier announced Samsung-SanDisk patent cross license agreement.

As the inventor of NAND flash memory, Toshiba has the largest portfolio of NAND flash memory patents with a couple thousand patents. Despite being the No. 2 NAND flash memory supplier, Toshiba has been at the forefront of introducing new process technologies. Its super self-aligned STI process introduced in its 90nm NAND flash products were copied by other vendors in their 70nm and 60nm processes. The company was also the first to introduce new materials for the wordline and bitline in its 56nm process, the same materials which were incorporated into Samsung's 42nm process. And the company also led the transition to 64-cell NAND strings.

By signing these agreements with Toshiba and SanDisk, Samsung continues to have access to important NAND flash process technology as well as multi-level cell flash memory design IP relevant for future NAND flash generations.

SandForce Unveils Revolutionary SSD Controller

2009-04-13T07:44:00.004-04:00

SandForce has emerged from stealth mode and unveiled a SSD controller for enterprise and mobile applications. Key features of the SF-1000 controller include:

- Dramatically higher endurance (80x) due to extremely low write amplification – significantly lower than the WA of current SSD vendors.
- Symmetrical read/write 30k IOPS and 250MB/s sequential
- 5 year drive life with no daily write limitation for MLC SSD
- No degradation in the performance as the drive fills up
- No need for external RAM or over-provisioning thereby reducing system costs
- ECC engine and RAID configuration of flash devices provides unrecoverable BER of 10E17

Existing solutions trade performance, reliability and endurance at the expense of additional cost. SandForce's DuraClass technology offers better performance, endurance and reliability at a lower system cost and paves the way for use of MLC NAND in a tiered storage hierarchy in enterprise systems. If SandForce is able to deliver on its promises, it is a truly revolutionary technology which will help drive the adoption of SSDs in both enterprise and mobile environments.

WD Buys its Way into SSDs

2009-03-30T09:24:00.005-04:00

Western Digital Corp., the 2nd largest HDD maker, announced that it had acquired SiliconSystems, Inc. for $65 million in cash. SiliconSystems is a major supplier of embedded SSDs to the network-communications, industrial, embedded-computing, medical, military and aerospace markets.

WD is no stranger to SSDs having dabbled in the technology in the early 1990's and being a founding investor of SanDisk which also developed flash-based SSDs in the same time period. However, it appears that early experience wasn't enough for a latecomer to catch up to the vast improvements in performance and reliability made by SSD vendors recently. System-level solutions particulary on the firmware side are required to manage the increasing complexities of NAND flash with each new technology generation.

WD is now able to leverage SiliconSystems' knowhow and IP to accelerate its development of SSD computing solutions. This knowhow combined with WD's branding and client relationships could make WD a formidable SSD vendor and validates the market opportunity provided by SSDs.

This acquisition will compel HDD suppliers to review their own internal development plans and may be the first with others to follow.

The First Domino Falls

2009-01-23T20:43:00.008-05:00

After failing to secure a 325 million Euro rescue package from the German state of Saxony, Portugal's CGD Bank and parent Infineon, Qimonda today filed for bankruptcy. At the current cash burn, the package would have kept Qimonda afloat for another two quarters. Qimonda plans to continue as an ongoing concern under the auspices of bankruptcy protection, although how it plans to do so is unclear. Suppliers and business partners are likely to ask for cash upfront in any business dealings with the company, In addition, the company will need to make investments in its innovative Buried Wordline (BWL) technology to remain competitive on the technology front. It is estimated that over half a billion dollars will be required for the transition to 46nm BWL.

Now that the first domino has fallen the question is: Who's next? Spansion has delayed interest payments due January 15 on its outstanding 11.25% Senior Notes. The company has a 30-day grace period to rectify the situation and at the same time, has retained Barclays Capital to explore "strategic alternatives" including merger or selling of assets. With the meltdown in electronics demand in Q4/08 and uncertain economic environment, Spansion is going to have a difficult time of closing any "strategic alternatives". It is highly likely the company will file for Chapter 11 before the 30-day grace period is up which would be the 2nd week of February.

Taiwanese DRAM manufacturer ProMOS is another potential domino. With the DRAM prices falling below cash costs, ProMOS cut is fab capacity utilization to low double digit percentage to conserve cash. The company has also resorted to asset sales having sold NT$1.9 billion (US$56.5 million) worth of wafer test equipment to Powertech Technology, NT$580 million (US$17.2 million) 300mm front end wafer fab equipment to TSMC and US$15 million in land to Kingston.

With ProMOS' share price at NT$1.51 prior to the start of the lunar new year, well below the NT$14.7 conversion price, ProMOS faces the prospect of redeeming a $330 million Euro convertible bond due February 14. Having only about NT$5.4 billion cash (US$160 million), ProMOS has applied for a bailout package from the Taiwan government, however the government is promoting industry consolidation and indigenous technology development as the condition for any support making any carte blanche bailout unlikely. An alternative is for creditor banks to swap their ECB holdings to ProMOS shares or to extend the redemption deadline. If these efforts fail, then ProMOS' fate may depend on the rumored Elpida-Powerchip-Rexchip-ProMOS merger. If the consolidation proposal meets the indigenous technology requirements, ProMOS may find a new life under a larger entity. ProMOS will have only two weeks after the lunar new year to find out.

Fujitsu Next

2008-12-02T22:40:00.002-05:00

Intel Corporation and Hitachi Global Storage Technologies announced that they will jointly develop Serial Attached SCSI (SAS) and Fibre Channel (FC) enterprise class solid-state drives (SSDs) for servers, workstations and storage systems. This is an exclusive agreement to develop and deliver SAS and FC enterprise SSDs with availability of the first products in early 2010.

This is a complementary partnership marrying Hitachi GST’s drive, channel and system knowledge together with Intel’s NAND flash and flash management expertise. Hitachi selected a strong NAND flash partner that doesn’t compete with it in its core HDD business. Now that two of the three enterprise HDD makers, Seagate and Hitachi, have publicly announced plans for enterprise SSDs, Fujitsu will be compelled to react, especially with its 23% enterprise HDD market share to protect.

Seagate may feel it is big enough to source the NAND flash and develop the SSDs on its own however, Fujitsu may need to develop a partnership with a NAND flash vendor. Two possible candidates: Micron and Hynix - NAND flash vendors with SSD ambitions but no competing HDD businesses. Micron has flash management expertise acquired through its own SSD development and leading cost structure based on 34nm technology. On the other hand, Hynix is lagging on both the SSD and NAND flash technology front.

If rumors of Western Digital acquiring Fujitsu's HDD business are correct, a company that has sat on the sidelines as companies have rushed into the SSD market will have to finally step up to the plate.

Spansion Becoming an IP Company

2008-11-18T22:17:00.000-05:00

Struggling to achieve profitability in its core business, Spansion has now turned to monetizing its portfolio of 3,000 patent and patent applications. Its first victim: Samsung. Spansion has filed two separate patent infringement claims against the company with the International Trade Commission and in the U.S. District Court in Delaware. Spansion is seeking an injunction in both cases on the sales of electronic devices containing Samsung flash memory and requesting treble damages in the Delaware claim for knowingly violating the patents.

Spansion is claiming Samsung infringed on 10 patents with four of them filed in the ITC complaint and six in the Delaware claim. The patents in question are related to NAND flash memory and include process patents describing methods of forming of the interpoly dielectric, shallow trench isolation as well as programming schemes. The patents, granted between 1998 and 2002, were filed by AMD, the pedigree of Spansion. AMD developed NAND technology and introduced a 64Mb UltraNAND on 0.25um technology in 1998. UltraNAND was supposed to do one better than NAND - 100% good blocks and 100k program/erase cycles without ECC - but it never took off and was subsequently shelved.

Why didn't Spansion instead go after Samsung, the No. 3 NOR vendor, with its much larger portfolio of floating gate NOR flash patents? Any successful claims against Samsung are likely to hurt more on the NAND side because of the size of Samsung's NAND business and the more diversified customer base. In addition, it's harder for Samsung to strike back because Spansion has no products based on floating gate NAND.

Spansion also claims to have the strongest portfolio of patents related to charge-trapping (CTF) technology which may be required to extend NAND flash below 30nm. However, it's not clear how applicable Mirrorbit patents are to SONOS NAND because the programming/erase mechanisms and gate stack are different. Spansion may be trying to plug that hole by commericalizing the first SONOS NAND - ORNAND2. In addition to satisfying its own demand for a NAND device in its MCPs, ORNAND2 is also a learning vehicle for developing CTF NAND IP. It'll be interesting to see what innovations Spansion introduces when ORNAND2 starts ramping in production the 2nd half of 2009 on 43nm.

Step 1?: Micron Closes Inotera Deal

2008-10-14T21:47:00.003-04:00

Micron and Qimonda finally closed a deal to transfer Qimonda's 35.6% stake in Inotera for $400 million. The move was widely expected given the termination of Nanya and Qimonda's joint DRAM development activities and Nanya's joint DRAM development and manufacturing ventures with Micron.

The acquisition of Inotera will allow Micron to merge its manufacturing JV with Nanya, Meiya, into Inotera - akin to a backdoor listing - and allow Meiya to access the capital markets immediately. The original plan was for Meiya to go IPO three years after the start of operations and obviously, there's no need for that anymore.

Micron paid only $400 million for 50% of the capacity of Inotera or 60k wpm. A 60k wpm fab would've cost them $2.7 billion to build - quite a bargain. However, Inotera will have to install copper tooling for the 68nm process plus convert from trench to stack process. This will require about $800 million although this won't necessarily come out of Micron's pocket.

As for Qimonda, it's a new lease on life. They would've burned through their cash by the end of the year wthout the cash injection from the deal. They're closing Richmond 200 and getting out of consumer and mobile DRAMs to focus on areas where they're strong - infrastructure and graphics. Whether that is enough for them to survive as a standalone company is questionable given the fact that Inotera accounted for roughly 1/3 of QI's internal wafer capacity and the importance of economies of scale in memory manufacturing. They will at least need to re-engage with Elpida in the joint development activities to reduce the R&D burden. Or maybe the Inotera deal was just step 1 in a phased acquisition of Qimonda and step 2 and 3 are in the offing.

Why does Samsung need SanDisk?

2008-09-05T17:59:00.006-04:00

There’s been a lot of speculation and analysis on why Samsung would acquire SanDisk. Here’s my take.

1. Samsung needs the capacity. – Samsung has enough capacity, especially in this market.

2. Samsung is attracted by SanDisk’s retail reach. – Samsung has a strong retail brand and could have leveraged its own retail channels to push flash cards through its distribution network if it wanted to. Why do it now?

3. Samsung saves on royalty fees and the savings justify an acquisition. – Pay $3 billion (SNDK’s market cap) to save on $400 million a year? Sounds pretty good. >10% ROI. But the level of that royalty stream is not guaranteed and I don’t think Samsung would do a deal just to save on royalty payments.

4. Samsung wants the IP. – Sometime in the next few years, FG NAND flash is likely to hit a brick wall and an alternative technology will be required. CTF has its problems and one of the potential options is 3D memory (see http://forward-insights.blogspot.com/2008/06/sandisk-and-toshiba-to-jointly-develop.html). SanDisk appears to have some fundamental IP in that area. Sure, Samsung could negotiate an extension to their existing cross licensing agreement with SanDisk to include 3D memory but they don’t get the knowhow. The knowhow is what is going to allow the leaders to scale the brick wall.

Samsung is not known for big acquisitions and its last big acquisition of AST Research 20 years ago is not considered a success. And it’s hard to imagine SanDisk’s manufacturing and joint development partner, Toshiba standing idly by as Samsung takes ownership of SanDisk’s most prized assets.

Seagate to Purchase SanDisk? Definitely, Maybe Not

2008-08-16T19:21:00.006-04:00

Rumors are flying about Seagate buying SanDisk or Intel's stake in Intel-Micron Flash Technologies (http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=210004140). Does it make sense? Seagate does need access to low cost NAND flash to fuel its SSD ambitions. Here are some ways to think about it.

1. If Seagate were to purchase SanDisk or Intel's portion of IMFT, what are they going to do with all that capacity? SSDs are not going to be able to eat up all that capacity, at least not for the next couple of years. Does Seagate want to manufacture flash memory cards or supply to MP3 players? SanDisk's operating margin in 2007 was 8% and Seagate's 6.8% in FY08. However, if you strip out income from royalties and licensing, SanDisk's operating margins were -5%. Combining a primarily OEM HDD business with a low margin retail business could be challenging.

2. Seagate is primarily interested in enterprise SSDs which uses exclusively SLC NAND flash technology. Any SanDisk acquisition provides Segate with 150k 300mm wafers per month of MLC NAND technology. Spending $4 billion (market cap of SanDisk) to obtain MLC NAND flash technology for enterprise SSDs? (SanDisk and partner Toshiba currently do not manufacture any high density SLC NAND parts, although that could change in the near future.)

3. Seagate spends almost $1 billion in capex ($930m in FY08) p.a. in their HDD business. SanDisk in 2007 spent roughly $1.6 billion and Intel $1 billion in NAND flash. Looks like Seagate's capex would have to at least double if it wants to become a NAND flash manufacturer and it's balance sheet would be strained supporting such a high level of investment.

4. Intel is not ready to exit NAND flash, at least not in the near term. IMFT has typically been behind the technology leaders by 1-2 process generations. With the 34nm announcement, they are about to leap ahead. With the technology lead, IMFT will presumably have the lowest costs. In addition, Intel will be releasing a slew of competitive SSD offerings in the next months. If, with the lowest costs in the industry and a very strong product lineup, Intel still can't make money, then it will consider whether it makes sense to be in this business, but they're not going to quit before giving it their best shot.

Seagate needs access to low cost NAND flash and they don't need to obtain that access by getting into the retail flash card business or doubling their annual capex. They could achieve the same means by either investing a small equity stake in a NAND flash vendor or placing an upfront payment to secure NAND flash capacity at preferential pricing. Apple did something similar when it introduced its first flash-based iPOD. Such an arrangement also affords Seagate sourcing flexibility especially if those wild hockey stick projections of SSD shipments don't pan out.

Finally! A Simple Metric for Solid State Drive Endurance

2008-07-23T21:31:00.014-04:00

We've all seen the impressive MTBF (mean time between failures) specifications of SSDs versus HDDs of one to two million hours versus 600 thousand hours in a notebook pc class application. However, unlike HDDs where a mechanical failure can make the entire HDD unusable, the main failure mechanism in a SSD relates to the memory cells becoming unusable. MTBF is a statistical calculation that unfortunately, does not capture the effect of write endurance.

The write endurance of a SSD is a function of the type of flash memory used (SLC, MLC), storage capacity, frequency of writes, data sizes of the writes and the amount of static data which relates to the wear leveling algorithm. System level endurance of SSDs in the industrial, enterprise and miliary space have ranged anywhere from one million to five million program/erase cycles. There are three main problems with this.

1. The endurance will depend on how the SSD is used in the application. As a result, SSD vendors can tweak the parameters for their own marketing purposes.

2. Not all SSD vendors use the same formula for calculating the endurance and the formulas can be overly complex.

3. A straight endurance metric is nebulous and difficult to grasp its implications, especially for OEMs who've never had to grapple with endurance issues in HDDs. For example: What's the effect on the lifetime of the drive?

SanDisk aims to solve this with the Longterm Data Endurance (LDE) metric. LDE is simply defined as the total amount of data writes allowed in the lifespan of the SSD. The metric is based on the Bapco write usage pattern for a typical business user and assumes the data is written equally over the lifetime of the drive and that data is retained for one year once the LDE specification is reached.

LDE allows OEMs a simple way to compare SSDs and determine, based on the applications usage patterns which drives are suitable for a particular application. For example, a drive with an 80TBW (teraByte write) LDE can support 20GB writes per day for 10 years (equivalent to 73TBW). For an application requiring support for only half the number of writes per day (10GB), a 40TBW rated drive would be sufficient.

The beauty of LDE is that it captures endurance in one single, understandable figure. A common metric is necessary to facilitate SSD adoption moving forward. Now comes the hard part: garnering support from other SSD vendors and OEMs.

I've uploaded a copy of Don Barnetson's presentation on LDE, "Solid State Drives: The MLC Challenge" on my website at http://www.forward-insights.com/.

Samsung Introduces Server-Grade NAND flash for SSDs

2008-07-17T16:34:00.002-04:00

Samsung Electronics announced today that it collaborated with Sun Microsystems to develop a SLC NAND flash memory with five times the endurance of conventional NAND flash memory. This would put the "ultra-endurance server-grade" flash memory at 500k program/erase cycles.

To extend the endurance, Samsung likely tweaked the underlying cell process and/or modified the programming algorithm. The net result is that the improved endurance comes at the expense of reduced performance or retention. However, by targeting high transactional enterprise applications with this device, the degraded retention should not be an issue.

SanDisk and Toshiba to Jointly Develop 3D Memory

2008-06-17T17:08:00.006-04:00

In a SEC filing today, SanDisk disclosed that it had signed a collaboration agreement with Toshiba for re-writeable 3D memory. Both companies will cross-license related IP to each other and SanDisk will receive licensing payments from Toshiba.

Investment for SanDisk-owned equipment which includes tooling for 3D R/W and 3D OTP memory is forecast to amount to $400 million in 2009 and $200 million in 2010.

The 3D R/W memory which consists of stacked vertical diode arrays shares most of the process modules and design architecture concepts with the 3D OTP memory. In the case of 3D OTP memory, four layers of stacked memory cells are in volume production at the 80nm node with 45nm currently under development.

A four level 3D R/W memory will have to at least catch up with NAND flash on process technology to be considered competitive with x4 NAND flash. This would put 3D R/W memory at least 3-4 years out. The other issue is whether an eight level stack is manufacturable at high yields. An eight-level stack was demonstrated by Matrix in 2003 on a much less advanced 0.25um geometry. Producing eight level memory stacks at leading edge technology is another matter.

Hynix Develops x3

2008-06-03T22:17:00.004-04:00

Hynix announced it has developed a 32Gb 3-bit per cell NAND flash slated for production in October. Hynix stated that the 3-bit per cell technology would enable cost reductions of 30% over 2-bit per cell technology. The 32Gb chip is based on 48nm process technology.

Based on my estimates, the die size of this device should be over 200mm2, much larger than the 172mm2 of the recently announced 34nm 32Gb MLC NAND flash from Intel/Micron. It is unlikely the chip is using the All-Bitline architecture developed by SanDisk and Toshiba implying a fairly low program performance.

The 32Gb chip will probably be employed as a learning vehicle for applications enablement until a more competitive 41nm offering comes out next year.

Intel and Micron Leapfrog the Competition

2008-05-29T08:05:00.001-04:00

Intel and Micron announced today that it will be sampling a 34nm 32Gb MLC NAND flash to customers in June with production slated for the second half of 2008. Owing to the aggressive gate half-pitch, immersion lithography with self-aligned double patterning employing spacers is most likely being used. Also expect changes in the bitline and wordline materials as well as a higher k interpoly dielectric in comparison to the 50nm generation.

At 172mm2, Intel-Micron's 32Gb product will be the only 32Gb monolithic MLC device capable of fitting in a TSOP package. If the ramp of IMFT's 50nm 16Gb device is any guide, we should expect to see volume in December or in early Q1/09. It's quite remarkable that Intel-Micron have managed to catch up and surpass the other NAND flash vendors on process technology in the short span of three years. IMFT achieved this milestone by skipping the 6xnm and 4xnm nodes. However, any cost advantage could be short-lived if IMFT fails to ramp up the technology smoothly and SanDisk/Toshiba ramps its 43nm 32Gb x3 in Q1/09 as planned.

Macronix: After the Qimonda Divorce

2008-04-21T22:44:00.013-04:00

Just 3.5 months after signing the agreement, Macronix International and Qimonda AG announced that Qimonda terminated the Flash technology license and joint development agreement. Having lost Euro 482 million in the most recent quarter as well as its technology partner, Nanya Technologies to Micron Technology, Qimonda is in survival mode. By cutting back its flash technology development, Qimonda intends to re-deploy resources to focus on ensuring the success of its new buried wordline DRAM technology.

Macronix, on the other hand, will need to either develop flash technology internally or with another partner. With only $487 million cash on its balance sheet at the end of 2007, Macronix will not be able to fund technology development as well as invest in a leading edge 300mm fab. It will clearly require partners.

However, the number of potential partners is limited as all NAND flash vendors with the exception of Samsung are already aligned with others. An earlier agreement to collaborate with Powerchip Semiconductor on flash memory development and foundry services at fab 12M ended due to a fight between the two companies over control of the Macronix board at last year's shareholders' meeting.

One long-shot possibility is Spansion which is rumored to be developing a SONOS-based memory in a NAND architecture dubbed "ORNAND2". However, the ORNAND2 cell is based on Mirrorbit technology and is therefore different than the BE-SONOS technology championed by Macronix which is based on electron tunneling for programming. The fact that ORNAND2 is based on Mirrorbit technology means it is not really a true NAND. Other than the diverging technology strategies, lingering negative sentiment over Spansion's 2006 trademark infringement lawsuit against Macronix makes any collaboration unlikely.

Despite its collaboration with Numonyx, Hynix may be the most attractive partner. Hynix and Numonyx jointly develop product designs, however, technology development rests mainly with Hynix. Normally a technology follower, Hynix will no longer to be able to just copy the technology of others if it is to become a technology leader. BE-SONOS offers a viable scaling path for sub-40nm NAND and a combination of Macronix's strong development team and Hynix's low cost 300mm wafer manufacturing could make a potent team.

Seagate Fires First Volley Against SSD maker

2008-04-14T22:37:00.005-04:00

Hard drive maker Seagate a lawsuit against solid state drive manufacturer STEC in the Northern District of California claiming STEC infringed four of Seagate’s patents related to how a SSD interfaces with computers. This is the first time a HDD manufacturer has sued a SSD maker.

It’s hard to see the financial motivation behind such a move. STEC’s enterprise SSD revenues were only $11 million in 2007, although it could reach 4-10x more this year depending on the ramp of the ZeusIOPS and Mach8 MLC product lines. With a market share of over 50% in enterprise HDDs, Seagate clearly sees a longer-term threat from the leading maker of enterprise SSDs.

However, a bigger motivation would be to send a signal to flash memory makers about the value of its intellectual property. It’s no secret that Seagate has been courting NAND flash vendors to secure NAND flash for a SSD it’s planning for the end of the year. A rumored JV with Micron fell apart last year and it is apparently in discussions with two of the three largest vendors. One of the main stumbling blocks is what Seagate could bring to any cooperation as all NAND flash vendors have ambitions to develop and market SSDs. This litigation could be a validation of the IP which Seagate can offer. Western Digital, which along with Seagate, was an early investor in SanDisk (then SunDisk) apparently holds some critical controller and wear leveling IP and could be next to enforce its IP.

SanDisk is taking no chances. In Q2/07, it set up Solid State Storage Solutions LLC with unknown partners that will license IP, presumably SSD-related IP. In July 2007, Solid State Storage Solutions LLC invested $42.5 million for the acquisition of intellectual property. It has apparently purchased relevant SSD and controller IP from Renesas Technology. This IP could prove effective in extracting royalties from flash memory card manufacturers and controller makers entering the SSD space, but it is questionable whether it is enough to counter any future claims by Seagate and WD.

Hynix Signs Another Deal

2008-04-01T22:28:00.001-04:00

Hynix signed another deal, this time with Grandis to jointly develop spin-torque RAM. Unlike the current MRAM products marketed by Freescale, STT-RAM uses the angular momentum derived from the spin of the electrical current to alter the magnetic orientation of a free layer. By having the current directly pass through the magnetic tunnel unction, the fields required to switch a bit can be scaled down as process geometries shrink.

This is the third in a string of technology deals starting last October with Ovonyx on phase change memory and with Nanosys on nanocrystal memory. Hynix has traditionally been a technology follower, mimicking Samsung’s advances on the technology front. However, as conventional DRAM and flash memories encounter scaling challenges alternative approaches may be required. STT-RAM is one of them.

Numonyx Born #1

2008-03-31T23:03:00.000-04:00

Intel and STMicroelectronics today announced the official launch of their JV, Numonyx. Numonyx combines the NOR flash assets of Intel and NAND and NOR assets of ST under one roof.

Numonyx starts out its first day as the number one NOR flash vendor, overtaking Spansion. Now, like Spansion and other NOR flash vendors, it must find a way to make money. It’s not going to be easy with the economy in bad shape and NOR flash pricing affected by falling NAND flash prices. The new company, does however, have a few things going for it.

1. By merging two similar businesses, there’s a lot of low hanging fruit and
opportunities to cut costs.

2. Numonyx will have dedicated facilities for production unlike in the past when it had to compete for resources with chipset or logic products.

3. Numonyx is 1.5 years and 2 years ahead of Spansion and Samsung on the technology roadmap.

4. At Intel and ST, flash memory was a side business. At Numonyx, flash memory is a core business.

This last point is what makes Numonyx a formidable competitor. It must succeed just to survive.

Hynix Connects the Dots

2008-03-22T09:20:00.002-04:00

On March 20, Nanosys, Inc. announced that Hynix Semiconductor Inc. will collaborate with Nanosys to employ Nanosys' quantum dot flash memory technologies (QDM) for NAND based flash memory. Hynix is the third major semiconductor manufacturer to sign up for access to Nanosys’ technology. Intel invested $38 million in Nanosys’ second round financing that closed in May 2003 and subsequently, announced a technical collaboration in 2004 to explore the use of nanocrystals in memory devices. In 2006, the collaboration was expanded to include Intel’s NAND flash memory partner, Micron Technology.

NAND-based nanocrystal memories can potentially provide a scaling path for current floating gate (FG) technologies by reducing the capacitive coupling between cells and eliminating SILC. The main challenge has been the controllability and uniformity of the nanocrystal size and distribution with technology scaling.
Nanosys claims to have solved this issue. Nanosys’ QDM with proprietary ligands are applied with a traditional spin-on process and self-assemble into a consistent monolayer on the wafer. The integration involves fewer process steps than either FG or nitride charge trap flash (CTF) alternatives while offering a very large voltage threshold window for enhanced MLC capability.

If QDM can deliver on its promise, we could see QDM enter into production at the 3xnm node and beyond.

Micron-Nanya Deal Re-shapes DRAM Landscape

2008-03-07T10:44:00.000-05:00

The signing of a memorandum of understanding between Micron Technology and Nanya Technology to jointly develop and manufacture sub-50nm DRAM technology re-shapes the DRAM landscape and places Nanya partner, Qimonda AG in a precarious situation. Although specifics of the final agreement are sketchy, one of the options is to form a 50/50 manufacturing JV in Nanya’s Fab3 which is only equipped to half of its full capacity. Nanya would license Micron’s 68nm technology platform and possibly participate in the joint development of 50nm and below technologies.

The following is our assessment of the impact on the various players.

Micron Technology

The big winner in this is Micron which reduces its capital intensity and increases its access to low cost Asian manufacturing capacity. In the last few years, Micron’s DRAM market share has dropped as it diversified its product portfolio into NAND flash and CMOS image sensors. As the 5th largest DRAM vendor in 2007 with roughly 10% market share, Micron is well poised to vie with Qimonda and Elpida for the No. 3 position.

Nanya Technology

It appears that Nanya, having completed joint development of 58nm trench technology with Qimonda harbored doubts about the scalability of the technology. Its concerns were validated last week when Qimonda announced the development of its “Buried Wordline” stack technology and a roadmap to continue scaling its DRAM technology based on this technology.
By cooperating with Micron, Nanya gains a clear technology roadmap for its business and more importantly, the relevant intellectual property and trade secrets required to manufacture stack technology.

The downside is that it’ll have to continue supporting two technology platforms in the next 2-3 years and absorb any manufacturing inefficiencies and additional fab investment required to make the conversion.

Qimonda AG

Qimonda loses a strong partner in Nanya and indirectly, the Formosa Plastics Group, and except for Samsung, is now the odd man out in relation to the partnerships of Hynix/ProMOS, Elpida/Powerchip and Micron/Nanya. In three years time, Qimonda may find itself in the position that Micron is in today: No. 5 and unprofitable – unless it is able to execute on its Buried Wordline technology.

A bigger issue is the impact on Inotera and the capacity implications for Qimonda.

Inotera

Inotera will have to eventually transition to stack technology whether it be from Micron or Qimonda, however, it is unlikely that Nanya will continue to work with Qimonda on the future technologies once the Micron deal is finalized. Qimonda has neither the cash nor resources to buyout and manage Inotera.

The likely outcome is for Qimonda to exit Inotera either by selling its shares to Nanya or institutional investors or to sell the shares on the open market. If it sells the shares via the open market, it may take a year to unwind its stake as Taiwan Stock Exchange regulations limit the amount of shares which can be disposed daily.

Qimonda which obtains 50% of the 120k wpm capacity from Inotera will lose out on 60k wpm which will not be easily replaced.

Perhaps a harbinger of the future of Inotera and the intense negotiations going on between Nanya and Qimonda, the domain name www.inotera.com has expired.

ProMOS

Infineon exited ProMOS after a nasty spat with partner Mosel Vitelic. ProMOS has been having difficulties in obtaining 66nm technology from Hynix due to Korean government restrictions on the export of advanced sub-80nm technologies. Is re-marriage in the cards for the former Infineon/Qimonda partner? Difficult to say, but don’t expect Hynix to give up on ProMOS without a fight.

Winbond, SMIC

Expect Qimonda to shore up its alliances with Winbond and SMIC. It needs the capacity. Winbond and SMIC have the upper hand and should be able to negotiate more favorable terms for producing the Buried Wordline technology. A deeper relationship with Winbond could be in the offing.

Market

It is unlikely to impact the supply-demand situation in the short term, but could negatively impact the supply-demand in the mid-term as competitors react by increasing output to maintain market share.
The Micron-Nanya cooperation creates a more formidable competitor in both the DRAM and NAND space and sets up Micron to become one of the top three memory vendors along with Samsung and Hynix. Elpida and Qimonda, pure DRAM vendors are looking for a NAND play. Stay tuned.

NAND Flash Capex - Full Steam Ahead!

2008-03-06T22:32:00.015-05:00

Despite the current oversupply environment and the heavy price drops this quarter (Intel reported ASP declines of 53%), NAND flash manufacturers are maintaining aggressive capex plans. Samsung's ramp of its Austin facility and Hynix's ramp of M11 will offset some of the retirement of 200mm NAND capacity from both companies.

IMFT has maximized its capacity at Manassas and Lehi and will ramp its Singapore fab with maximum capacity of 60k wpm starting in Q3/08. Toshiba/SanDisk's Fab3 reached its full capacity of 150k wpm in September 2007 with Fab4 volume ramp started in December. Fab4 is a massive fab with maximum capacity of 210k wpm.

Powerchip Semiconductor is currently building two fabs P4 and P5 dedicated to the manufacture of NAND flash. These fabs are not expected to ramp in volume until the 50nm generation in 2009.

Spansion as well as foundry partners TSMC and SMIC capex figures includes fungible capacity that may be used to manufacture Mirrorbit NOR.

Qimonda Digs Itself Out of Trench

2008-03-05T15:26:00.002-05:00

Qimonda created a stir last week when it unveiled a new DRAM technology called “Buried Wordline Technology” which purportedly consumes less power than conventional stacked capacitor DRAMs. This is achieved by reducing the capacitive coupling between the bitline and wordline by burying the wordline in the substrate of the device. An image of the buried wordline in Qimonda’s presentation appears to show tungsten as the wordline material. The middle of line process in the memory array is greatly simplified compared to standard stacked capacitor devices resulting in reduced process complexity.

Another surprising feature was the absence of a trench capacitor. Qimonda has responded to skepticism regarding the scalability of trench technology by switching to a cylindrical stacked capacitor for its DRAM roadmap down to the 3xnm generation. Qimonda plans to ramp its 65nm buried wordline technology with cell size of 6F2 in parallel with its 58nm 8F2 trench capacitor technology in the second half of 2008. The 65nm 1Gb device sports a die size of 55mm2 comparable to Micron’s 68nm 1Gb DDR2 chip size of 56mm2.

Subsequent 46nm and 3xnm 6F2 generations will be introduced in 2009 and 2010 respectively with a 3xnm 4F2 technology targeted for 2011. According to Qimonda, the 46nm technology is expected to effectively double the number of die per wafer versus the 58nm trench technology allowing the company to take the lead in productivity vis-à-vis the competition. This productivity boost is particularly important for driving down costs, especially in light of the massive €598 million net loss the company posted in the fourth quarter of calendar year 2007 on net sales of €513 million.

Qimonda stated that an incremental investment of €100 million over its existing investment for trench technology would be required to make the transition to the new technology. This would include deposition and etch tooling for hi-k capacitor formation.

The company hinted that the new technology opens up partnering opportunities which is expected to include Qimonda’s manufacturing and foundry partners, Winbond and SMIC although Inotera's participation is questionable given the recent tie-up between Nanya and Micron Technology. If licensing deals with these parties are reached, they would be expected to make similar investments for the conversion from trench to stack technology.

Currently, Qimonda, along with partner Nanya Technology, are the sole remaining DRAM players engaged in the development and production of trench capacitor DRAM technology accounting for a combined 18% of the DRAM market in 2007. The remaining 82% consists of Samsung, Hynix/ProMOS, Elpida/Powerchip and Micron Technology, which are all part of the stacked capacitor camp. With Qimonda’s announcement, trench technology is expected to be phased out of the market in the next three years.

It is also difficult to ignore the timing of the announcement. It appears that Qimonda was pressured to reveal details of its roadmap plans after rumors of a joint development and production agreement between its partner, Nanya Technology and Micron Technology surfaced. The rumors were subsequently confirmed when a memorandum of understanding was announced between the two parties on March 3.

Flash Memory Replacement Achieves Major Milestones

2008-02-11T15:26:00.002-05:00

At last week’s ISSCC, Intel and STMicroelectronics presented a paper demonstrating the first multi-level cell phase change memory [PCM]. The chip is a 256Mb device based on 90-nanometer process technology. PCM has been touted as a potential replacement for flash memory due to its fast reads and writes and superior endurance.

On the same day of the ISSCC paper, Intel and ST began shipments of prototype samples to customers of a 128Mb chip also based on the same 90nm technology. Careful reading of the ISSCC paper implies that the 256Mb MLC device and the 128Mb device are one and the same chip. The MLC technology is still in the research phase and it appears the prototype samples have the MLC functionality disabled.

The 128Mb product is mainly a learning vehicle to improve the technology for volume manufacturing, to learn about which applications may be suitable for PCM and to develop the firmware to support the devices. Due to the high initial cost of PCM, the 90nm devices will have limited production volume, however, this is expected to change as PCM migrates to more advanced process technologies and MLC technology is deployed.

PCM’s time will come as flash memory encounters scaling limitations within the next five years.

SanDisk's 3-Bit/Cell NAND Flash Technology Not a Short-Term Play

2008-02-11T09:22:00.001-05:00

The development of a 16-gigabit 3-bit per cell (x3) NAND flash on 56-nanometer process technology by SanDisk and Toshiba offers the promise of further NAND flash memory cost reductions.

Due to higher design complexity, lower number of usable blocks and longer test times, x3 technology is expected to offer approximately 20% cost savings over comparable MLC devices at the same process generation.The key innovation of the x3 16Gb chip is the write performance of 8-megabytes per second (MB/s).

This outstanding performance is comparable to 5xnm MLC devices currently on the market and was enabled mainly through the development of an All Bit Line [ABL] architecture and advanced programming algorithms. ABL will also be deployed on all of SanDisk/Toshiba’s MLC devices boosting write performance to 34MB/s – comparable to SLC devices on the market.Alas, the full cost benefits of x3 won’t be realized for another two years, the reason being x3 is currently about one year behind MLC on the technology roadmap.

Nevertheless, Samsung and Intel - Micron Flash Technologies are expected to join the fray in 2008/9 and by 2012, 3-bit per cell NAND is forecast to account for 52.8% of NAND flash memory bits, followed by MLC NAND at 25.4%, 4-bit/cell NAND 16.6% and SLC NAND 4.4%.

Qimonda and Macronix Join the Flash Memory Fray

2008-01-04T17:35:00.002-05:00

On January 3, Qimonda AG and Macronix International announced they had signed an agreement to jointly development a variety of non-volatile memory technologies over a five-year period. Qimonda will contribute its 300mm wafer-based technology and non-volatile development expertise while Macronix will contribute its extensive know-how in flash memory technologies. Both partners will share development costs and contribute engineering resources and know-how. The joint development will be conducted at Qimonda’s 300mm R&D and manufacturing facility in Dresden, Germany.

Our Take

Macronix’s original Taiwan Stock Exchange filing reveals that this agreement is a “Flash Technology License and Joint Development Agreement”. This coupled with Qimonda CEO, Kin Wah Loh’s remarks concerning Qimonda’s intent to resume production of NAND flash memory chips in 2009 implies that both parties intend to participate in the NAND flash memory space.

Macronix has made some notable progress with its charge trap flash technology, BE-SONOS and it is quite possible the joint development will direct its efforts on this technology, among others. Macronix’s plan to develop 45nm BE-SONOS in 2010 does not totally square with Qimonda’s 2009 timeframe. BE-SONOS is unproven and even if both parties were able to introduce product in 2009 or 2010, they would still be one to two process generations behind the current NAND players. On the other hand, if they are successful, they could have a technology which is more scalable than the current floating gate technology.

Samsung and Toshiba Form United Front against ONFI

2007-12-03T14:37:00.001-05:00

On December 3, 2007, Samsung Electronics and Toshiba Corp. announced that they have licensed to one another, the product specifications and the rights to produce and market Samsung’s OneNAND and Flex-OneNAND, and Toshiba’s LBA-NAND and mobile LBA-NAND memory chips.

Both companies plan to develop compatible products based on the respective specifications to be released next year.

Our Take

After sitting on the sidelines and watching while ONFI amassed a membership roster of 57 companies since its establishment in May 2006, Samsung and Toshiba have finally acted and joined hands to develop products based on common specifications. Both companies are no strangers to collaboration, having shared common NAND specifications for years.
LBA-NAND, Toshiba’s solution for managing the increasing ECC requirements and bad block management of NAND flash by combining NAND flash memory with a controller in a single package, is expected to become mainstream for devices at 40nm and below. ONFI responded with their own version: BA-NAND. With Samsung’s backing, LBA-NAND is expected to be a very viable alternative to BA-NAND.

As for OneNAND, Samsung has been pressured by mobile phone manufacturers to license OneNAND to ensure a second source for the devices. Last year, Samsung licensed OneNAND to ST Microelectronics and now Toshiba. Toshiba and SanDisk (former M-Systems) jointly developed mDOC (mobile Disk-on-Chip) which is similar to OneNAND but based on MLC NAND. Both products integrate a NAND core, SRAM, error correcting engines, and logic circuits in a single chip with a NOR interface. In fact, OneNAND was developed by Samsung based on IP licensed from M-Systems with the licensing agreement subsequently terminated in 2005. mDOC has never been a significant product line for Toshiba and resource-wise, it does not make sense for Toshiba to invest in two similar but incompatible, competing solutions. It appears opting to support OneNAND at the expense of mDOC is the price Toshiba is willing to pay to garner Samsung’s backing for LBA-NAND.

Spansion ORNAND2: NAND Or AND…

2007-11-15T20:32:00.001-05:00

Spansion ORNAND2: NAND Or AND…

Spansion today announced the development of Mirrorbit ORNAND2, a new memory architecture employing Mirrorbit technology in a NAND memory array. Mirrorbit ORNAND2 will be introduced at the 45nm generation and targeted primarily at integrated data storage applications. Spansion claims the ORNAND2 requires 25 percent fewer mask layers than Spansion's 65nm MirrorBit ORNAND and offers “NAND-equivalent performance”.

Our Take
There are two areas where Spansion needs to take Mirrorbit ORNAND to be on a more equal footing with NAND in data storage applications.

1. Cost
2. Performance, particularly program performance.

Currently, the Mirrorbit cell size is around 8F2 versus 4F2 for NAND and ORNAND program performance is less than half that of MLC NAND. By scaling the current Mirrorbit ORNAND architecture, it would be difficult for ORNAND to make progress on either of these fronts, which is the reason for ORNAND2. So what exactly is ORNAND2?

Its use of Mirrorbit technology rules out SONOS NAND implementations such as Samsung’s TANOS and Macronix’s BE-SONOS. A cursory look at Spansion’s patent filings reveals they may be using a SONOS cell using inversion layers as bitlines. Hitachi and Renesas pioneered a similar concept in their floating gate-based AG-AND technology. The cell size of AG-AND was reduced dramatically from its AND predecessor by eliminating bitline diffusion and shallow trench isolation structures. Instead, an inversion layer formed by biasing an assist gate (AG) was used to form the source/drain regions. Programming was accomplished by source-side injection (SSI).

Spansion appears to have taken this concept and extended it to its Mirrorbit technology. The polysilicon floating gate has been replaced with a charge trapping layer, presumably ONO and the AG’s are now bitline gates. By employing SSI, two localized charges can be stored at opposite sides at the periphery of the cell.

The use of inversion-bitlines could potentially reduce the Mirrorbit cell size to 6F2. In addition, the greater electron efficiency of SSI versus CHE (channel hot electron injection) could provide a boost to the program performance. For example, AG-AND achieved a program performance of almost 10MB/s with 4-bank interleaving – comparable to MLC NAND.

Renesas stopped further development of AG-AND technology in 2005 and licensed production of the 90nm and 65nm product generations to Powerchip Semiconductor. PSC has, however, struggled to bring up the 90nm technology to high yields and has not made the transition to 65nm.

If Mirrorbit with inversion-bitlines is the approach Spansion has decided to take with Mirrorbit ORNAND2, it appears Spansion is confident it is able to overcome the challenges experienced by Renesas and PSC in ramping this technology in a high-volume manufacturing environment.