Showing posts with label Spansion. Show all posts
Showing posts with label Spansion. Show all posts

Friday, February 5, 2010

A New NAND Flash Player Emerges?

The U.S. Bankruptcy Court for the District of Delaware approved an agreement by Spansion’s debtors to transfer its Milan development facilities to Elpida Memory. Details of the agreement are unclear at the moment, however, Spansion will apparently retain IP rights for the technology developed at the research center.

Spansion established its Security and Advanced Technology Division (SATD) in 2007 and staffed it with ex-STMicroelectronics NAND flash engineers including division head, Carla Golla who prior to joining Spansion was the general manager of ST’s NAND Flash and Storage Media product group.

The division’s mission is to develop secure products such as the MirrorBit HD-SIM product family and ORNAND2. ORNAND2 - unlike ORNAND which is a Mirrorbit with a NAND interface – is a true NAND architecture based on SONOS technology. Spansion needed a NAND device for its MCPs and ORNAND2 was the solution which allowed Spansion to utilize its charge trap flash knowhow and sidestep IP issues related to floating gate devices. SATD was responsible for product design for ORNAND2 and the process technology was developed in the U.S.

Spansion had planned to ramp ORNAND2 into production in the second half of 2009 on 43nm with foundry partner SMIC. Needless to say, those plans were derailed with Spansion’s Chapter 11 filing.

Elpida has been a supplier of mobile DRAM to Spansion and has lost a major customer as Spansion exits the wireless market. In addition, Elpida is the only tier 1 DRAM company without NAND flash in its product portfolio. Being a second tier supplier of DRAM KGD (known good die) to NOR flash suppliers is an unenviable position. Elpida needs to capture more of the value-added and capitalize on the shift from NOR flash to NAND flash in the cellphone market.

Elpida’s newly acquired asset will allow it to do just that by leveraging SATD’s development of 1Gb-4Gb SLC NAND to offer NAND/DRAM MCP solutions. Whether the device will be SONOS or floating gate-based is not certain, however the fact that Spansion will retain partial IP ownership of SATD developments suggests at some sort of cooperation utilizing Spansion’s SONOS technology. This initial foray into low density SLC NAND may just portend even greater ambitions in the high density data storage market.

Friday, January 23, 2009

The First Domino Falls

After failing to secure a 325 million Euro rescue package from the German state of Saxony, Portugal's CGD Bank and parent Infineon, Qimonda today filed for bankruptcy. At the current cash burn, the package would have kept Qimonda afloat for another two quarters. Qimonda plans to continue as an ongoing concern under the auspices of bankruptcy protection, although how it plans to do so is unclear. Suppliers and business partners are likely to ask for cash upfront in any business dealings with the company, In addition, the company will need to make investments in its innovative Buried Wordline (BWL) technology to remain competitive on the technology front. It is estimated that over half a billion dollars will be required for the transition to 46nm BWL.


Now that the first domino has fallen the question is: Who's next? Spansion has delayed interest payments due January 15 on its outstanding 11.25% Senior Notes. The company has a 30-day grace period to rectify the situation and at the same time, has retained Barclays Capital to explore "strategic alternatives" including merger or selling of assets. With the meltdown in electronics demand in Q4/08 and uncertain economic environment, Spansion is going to have a difficult time of closing any "strategic alternatives". It is highly likely the company will file for Chapter 11 before the 30-day grace period is up which would be the 2nd week of February.

Taiwanese DRAM manufacturer ProMOS is another potential domino. With the DRAM prices falling below cash costs, ProMOS cut is fab capacity utilization to low double digit percentage to conserve cash. The company has also resorted to asset sales having sold NT$1.9 billion (US$56.5 million) worth of wafer test equipment to Powertech Technology, NT$580 million (US$17.2 million) 300mm front end wafer fab equipment to TSMC and US$15 million in land to Kingston.

With ProMOS' share price at NT$1.51 prior to the start of the lunar new year, well below the NT$14.7 conversion price, ProMOS faces the prospect of redeeming a $330 million Euro convertible bond due February 14. Having only about NT$5.4 billion cash (US$160 million), ProMOS has applied for a bailout package from the Taiwan government, however the government is promoting industry consolidation and indigenous technology development as the condition for any support making any carte blanche bailout unlikely. An alternative is for creditor banks to swap their ECB holdings to ProMOS shares or to extend the redemption deadline. If these efforts fail, then ProMOS' fate may depend on the rumored Elpida-Powerchip-Rexchip-ProMOS merger. If the consolidation proposal meets the indigenous technology requirements, ProMOS may find a new life under a larger entity. ProMOS will have only two weeks after the lunar new year to find out.

Tuesday, November 18, 2008

Spansion Becoming an IP Company

Struggling to achieve profitability in its core business, Spansion has now turned to monetizing its portfolio of 3,000 patent and patent applications. Its first victim: Samsung. Spansion has filed two separate patent infringement claims against the company with the International Trade Commission and in the U.S. District Court in Delaware. Spansion is seeking an injunction in both cases on the sales of electronic devices containing Samsung flash memory and requesting treble damages in the Delaware claim for knowingly violating the patents.

Spansion is claiming Samsung infringed on 10 patents with four of them filed in the ITC complaint and six in the Delaware claim. The patents in question are related to NAND flash memory and include process patents describing methods of forming of the interpoly dielectric, shallow trench isolation as well as programming schemes. The patents, granted between 1998 and 2002, were filed by AMD, the pedigree of Spansion. AMD developed NAND technology and introduced a 64Mb UltraNAND on 0.25um technology in 1998. UltraNAND was supposed to do one better than NAND - 100% good blocks and 100k program/erase cycles without ECC - but it never took off and was subsequently shelved.

Why didn't Spansion instead go after Samsung, the No. 3 NOR vendor, with its much larger portfolio of floating gate NOR flash patents? Any successful claims against Samsung are likely to hurt more on the NAND side because of the size of Samsung's NAND business and the more diversified customer base. In addition, it's harder for Samsung to strike back because Spansion has no products based on floating gate NAND.

Spansion also claims to have the strongest portfolio of patents related to charge-trapping (CTF) technology which may be required to extend NAND flash below 30nm. However, it's not clear how applicable Mirrorbit patents are to SONOS NAND because the programming/erase mechanisms and gate stack are different. Spansion may be trying to plug that hole by commericalizing the first SONOS NAND - ORNAND2. In addition to satisfying its own demand for a NAND device in its MCPs, ORNAND2 is also a learning vehicle for developing CTF NAND IP. It'll be interesting to see what innovations Spansion introduces when ORNAND2 starts ramping in production the 2nd half of 2009 on 43nm.

Monday, April 21, 2008

Macronix: After the Qimonda Divorce

Just 3.5 months after signing the agreement, Macronix International and Qimonda AG announced that Qimonda terminated the Flash technology license and joint development agreement. Having lost Euro 482 million in the most recent quarter as well as its technology partner, Nanya Technologies to Micron Technology, Qimonda is in survival mode. By cutting back its flash technology development, Qimonda intends to re-deploy resources to focus on ensuring the success of its new buried wordline DRAM technology.

Macronix, on the other hand, will need to either develop flash technology internally or with another partner. With only $487 million cash on its balance sheet at the end of 2007, Macronix will not be able to fund technology development as well as invest in a leading edge 300mm fab. It will clearly require partners.

However, the number of potential partners is limited as all NAND flash vendors with the exception of Samsung are already aligned with others. An earlier agreement to collaborate with Powerchip Semiconductor on flash memory development and foundry services at fab 12M ended due to a fight between the two companies over control of the Macronix board at last year's shareholders' meeting.

One long-shot possibility is Spansion which is rumored to be developing a SONOS-based memory in a NAND architecture dubbed "ORNAND2". However, the ORNAND2 cell is based on Mirrorbit technology and is therefore different than the BE-SONOS technology championed by Macronix which is based on electron tunneling for programming. The fact that ORNAND2 is based on Mirrorbit technology means it is not really a true NAND. Other than the diverging technology strategies, lingering negative sentiment over Spansion's 2006 trademark infringement lawsuit against Macronix makes any collaboration unlikely.

Despite its collaboration with Numonyx, Hynix may be the most attractive partner. Hynix and Numonyx jointly develop product designs, however, technology development rests mainly with Hynix. Normally a technology follower, Hynix will no longer to be able to just copy the technology of others if it is to become a technology leader. BE-SONOS offers a viable scaling path for sub-40nm NAND and a combination of Macronix's strong development team and Hynix's low cost 300mm wafer manufacturing could make a potent team.

Thursday, March 6, 2008

NAND Flash Capex - Full Steam Ahead!


Despite the current oversupply environment and the heavy price drops this quarter (Intel reported ASP declines of 53%), NAND flash manufacturers are maintaining aggressive capex plans. Samsung's ramp of its Austin facility and Hynix's ramp of M11 will offset some of the retirement of 200mm NAND capacity from both companies.

IMFT has maximized its capacity at Manassas and Lehi and will ramp its Singapore fab with maximum capacity of 60k wpm starting in Q3/08. Toshiba/SanDisk's Fab3 reached its full capacity of 150k wpm in September 2007 with Fab4 volume ramp started in December. Fab4 is a massive fab with maximum capacity of 210k wpm.
Powerchip Semiconductor is currently building two fabs P4 and P5 dedicated to the manufacture of NAND flash. These fabs are not expected to ramp in volume until the 50nm generation in 2009.

Spansion as well as foundry partners TSMC and SMIC capex figures includes fungible capacity that may be used to manufacture Mirrorbit NOR.

Thursday, November 15, 2007

Spansion ORNAND2: NAND Or AND…

Spansion ORNAND2: NAND Or AND…

Spansion today announced the development of Mirrorbit ORNAND2, a new memory architecture employing Mirrorbit technology in a NAND memory array. Mirrorbit ORNAND2 will be introduced at the 45nm generation and targeted primarily at integrated data storage applications. Spansion claims the ORNAND2 requires 25 percent fewer mask layers than Spansion's 65nm MirrorBit ORNAND and offers “NAND-equivalent performance”.

Our Take
There are two areas where Spansion needs to take Mirrorbit ORNAND to be on a more equal footing with NAND in data storage applications.


1. Cost
2. Performance, particularly program performance.

Currently, the Mirrorbit cell size is around 8F2 versus 4F2 for NAND and ORNAND program performance is less than half that of MLC NAND. By scaling the current Mirrorbit ORNAND architecture, it would be difficult for ORNAND to make progress on either of these fronts, which is the reason for ORNAND2. So what exactly is ORNAND2?

Its use of Mirrorbit technology rules out SONOS NAND implementations such as Samsung’s TANOS and Macronix’s BE-SONOS. A cursory look at Spansion’s patent filings reveals they may be using a SONOS cell using inversion layers as bitlines. Hitachi and Renesas pioneered a similar concept in their floating gate-based AG-AND technology. The cell size of AG-AND was reduced dramatically from its AND predecessor by eliminating bitline diffusion and shallow trench isolation structures. Instead, an inversion layer formed by biasing an assist gate (AG) was used to form the source/drain regions. Programming was accomplished by source-side injection (SSI).

Spansion appears to have taken this concept and extended it to its Mirrorbit technology. The polysilicon floating gate has been replaced with a charge trapping layer, presumably ONO and the AG’s are now bitline gates. By employing SSI, two localized charges can be stored at opposite sides at the periphery of the cell.

The use of inversion-bitlines could potentially reduce the Mirrorbit cell size to 6F2. In addition, the greater electron efficiency of SSI versus CHE (channel hot electron injection) could provide a boost to the program performance. For example, AG-AND achieved a program performance of almost 10MB/s with 4-bank interleaving – comparable to MLC NAND.

Renesas stopped further development of AG-AND technology in 2005 and licensed production of the 90nm and 65nm product generations to Powerchip Semiconductor. PSC has, however, struggled to bring up the 90nm technology to high yields and has not made the transition to 65nm.

If Mirrorbit with inversion-bitlines is the approach Spansion has decided to take with Mirrorbit ORNAND2, it appears Spansion is confident it is able to overcome the challenges experienced by Renesas and PSC in ramping this technology in a high-volume manufacturing environment.